Kwanyeob Chae is a Principal Engineer at Samsung Foundry and responsible for DDR PHY design in IP development team. He is engaged in the development of digital circuits and design methodologies for high speed memory interface. His research interests include design methodology, physical implementation, high speed digital PHY architecture, self-adaptive circuits, low-power circuits, and variation-tolerant design. Kwanyeob Chae received his B.S. and M.S. degrees in electronics engineering from Korea University, Seoul, Korea. He received his Ph.D. degree in electrical and computer engineering from Georgia Institute of Technology, Atlanta.
Sean Lee is CEO of Openedges Technology, Inc. and responsible for managing strategic growth of the company through technological leadership. He has more than 20 years of IP and SoC design experiences including numerous generations of Exynos mobile AP for Galaxy Smartphones. His background includes CPU architecture, memory subsystem IP design, and mobile AP SoC design, and he holds several patents on memory subsystem architecture. Sean holds B.S. and M.S. degree in Electrical Engineering and Computer Science from Seoul National University of South Korea.
Ashish Shrotriya is Director of Worldwide Foundry and IP Business Development at Silvaco. Prior to Silvaco, Ashish has held senior strategic marketing and program management roles at leading semiconductor and IP companies including Honeywell, Applied Materials, Efficient Solar Power Systems, TSMC, and Virage Logic. Ashish is the author of five patents and holds an MBA from Cornell University and an MS in electrical engineering from Michigan Technological University.