• VarMan XMA Option

VarMan XMA Option Full-chip Memory Yield Analyzer

Due to the extreme size, creating a full memory SPICE simulation of a memory is a real challenge. Existing solutions work by extracting memory slices or critical paths, simulating them, and performing limited Monte Carlo analysis, then extrapolating the results. This can introduce significant error in the yield estimation. While Fast SPICE simulations seem practical, the accuracy could be compromised. Numerical methods that combine individual block sigma-corners may lead to unrealistic results.

Running Monte-Carlo Analysis on the Entire Memory

VarMan XMA doesn’t analyze only the critical path or a memory slice. This innovative solution considers the entire memory, analyzes the variation impact, performs Monte Carlo analysis, and estimates yield. XMA is an intuitive and easy-to-use solution that makes it possible to rebuild the memory and simulate the design with the golden SPICE.  It is an option to VarMan Memory.

VarMan XMA provides the unique ability to run very efficient variation-aware analyses. It employs VarMan’s innovative Fast Monte Carlo and robust high-sigma kernels for a fast-fail detection and yield estimation of the entire memory.

XMA Option Features:

  • Advanced and intuitive GUI
  • Build for entire memory analysis takes only minutes
  • Verified on leading planar CMOS, FDSOI and FInFET foundry technologies
  • Works with industry golden SPICE circuit simulators
  • Comprehensive statistical analysis of variation impact for yield estimation

SRAM Application Example

  • SRAM with 8K x 80 bits per memory cell
  • 10,000 simulations to cover 100K memory instances
  • 100K instances equivalent to 100K x 8192×80 = 65,536M runs
  • 2 Failures detected

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Customers

Frédéric Masson
 This is the solution we were impatiently awaiting. Simulating a whole memory and analyzing accurately and quickly its yield has been a lastingly longed-for feature. 
Emmanuel Sabonnadiere
 Setting up advanced methods is essential with emerging technologies developed by CEA-Leti and the increase of memories’ needs. If a new method allows characterizing memory designs more quickly at a given condition of use, the entire characterization process that covers all conditions is accelerated 
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