• Analog Simulation

Overview

Silvaco’s SmartSpice is a high performance parallel SPICE simulator that delivers industry leading accuracy. It is a proven, comprehensive solution for applications including simulation of complex high precision analog and mixed-signal circuits, memory, custom digital design and characterizing cell libraries of advanced semiconductor processes. It uses an intelligent architecture deploying multiple solvers, stepping algorithms and computation techniques. The result is accurate, robust convergence and industry leading performance and capacity – over 8 million active devices. It is compatible with HSPICE® and Spectre® for netlists, models, analysis features, and results – plus large libraries of calibrated device models are available. Featuring integration with Silvaco Gateway schematic editor and SmartView waveform viewer, SmartSpice fits seamlessly into front-end analog IC design flows.

SmartSpice supports advanced features:

  • Real-time waveform analysis update through interactive rubberband feature for on-the-fly circuit tuning.
  • Complete suite of built-in local and global circuit optimization engines
  • Rad-hard simulation capability for modeling and analyzing radiation effects due to single event effects (SEE), and dose rate (DR)
  • Verilog-A language support provides circuit designers and model developers with an easy-to-use, comprehensive environment for the development of circuit macro-models, new compact device models, and the use of  existing industry standard compact models in SmartSpice simulations.

SmartView is Silvaco’s graphical environment for performing real-time and post-simulation waveform viewing and data analysis of analog, RF, digital and mixed-signal circuits. User configurable preference controls, an intuitive GUI and a library of advanced measurement makes SmartView an easy to use and productive simulation analysis environment. It support real-time interaction with SmartSpice and Gateway schematic editor for on-the-fly design tuning.

SmartSpice Pro delivers superior performance for SRAM and TFT-based display designs. Unique fast-SPICE algorithms are combined in the tool to provide fast and SPICE-accurate simulation for multi-million-size memory and display circuits.

Analog Custom Design Resources

Analog Simulation
Analog Custom Design & Analysis
SmartSpiceGateway
Model Generation
Guardian DRC
Utmost IVGuardian LVS
Parasitic Extraction
Expert
Hipex
Gateway – Schematic CaptureJivaro– Parasitic Reduction for Fast, Accurate Simulation
Expert – Layout EditorViso – Parasitic Analyzer and Debugger
Guardian – DRC/LVS/Net Physical VerificationBelledonne – Layout Parastic Extraction Comparison
SmartSpice – Circuit SimulatorVarMan – Statistical Variation and Yield Analyzer
SmartView – Waveform AnalyzerVarMan XMA Option – Full-chip RAM Yield Analyzer
SmartSpice RadHard – Radiation Effects Circuit SimulatorVarMan for Libraries – Library Statistical Functional Verification
SmartSpice Pro– FastSPICE SimulatorUtmost IV– Device Characterization and SPICE Modeling
Hipex – Full-Chip Parasitic ExtractionUtmost IV Quick-Start– Model extraction and Optimization Templates
TechModeler – Verilog-A Blackbox Device Modeling

How to Model and Simulate Flat Panel Pixel Arrays


Videos

News

Blogs

Customer Interview: Why I Rely on SmartSpice

Customers

Cameron Fisher
 MSC has found SmartSpice™ to be an excellent value in terms of easy integration, debug run time and total cost of simulation. Support during our learning curve has been great. MSC will be using SmartSpice™ for all future memory complier development.