Silvaco’s product suite is used for design of both thin-film transistor (TFT) LCD displays and organic LED (OLED) displays. With the growth in adoption of smartphones, flat-screen TVs, smart watches and more this is an area of increasing importance. Almost all manufacturers of displays use the Silvaco suite for design and most of these designs are in high-volume manufacturing.

For TFT design there is full support for amorphous silicon (a-Si), p-Si, a-IGZO and organic TFT processes. There is also full support for active matrix OLED and LCD design.

Silvaco has a complete flow from TCAD-to-Signoff for TFT design. The foundation of the flow is TCAD that allows the details of the process to be built up. The device characteristics that TCAD produces can be used for a first level of analysis and then special SPICE compact models such as RPI for a-Si TFT or UOTFT for organic and oxide TFTs can be created.



A 3D field-solver can be used for pixel RC extraction to ensure that the displays have the sensitivity required to meet performance specification. Extraction of interconnect RC is also done using a full-chip parasitic extractor. Because displays are large, sometimes very large, the simulation capacity is very important. A simulator extended to meet FastSPICE applications is available and can run with parallel cores and huge capacity to handle the largest displays. Display hysteresis can also be simulated. Similarly, Silvaco can handle full-panel layout of the largest displays, with high performance input and output, and high performance editing.



There is a full PDK generation capability to create the links necessary between the TCAD world and the world of design. At the design level, layout can be created and analyzed, again with high capacity so that very large displays can be read, written and edited fast.



  • a-Si , p-Si, a-IGZO TFT, Organic TFT, OLED, AMOLED, AMLCD
  • Lattice Self-heating Models
  • Singlet-Triplet Exciton Models
  • OLED Transfer Matrix Method Simulation, Radiant OLED GUI
  • Finite Difference Time Domain Simulation
  • Pixel RC extraction
  • Interconnect RC extraction for tech file generation
  • LCD static and optical simulation
Model Extraction
  • RPI a-Si, p-Si Models
  • UOTFT model (organic and oxide)
  • TechModeler fast fitting for organic transistors, OLED
SPICE Simulation
  • Parallel SPICE for high accuracy sensitive control circuits
  • Large Capacity for Full Panel FastSPICE Simulation
  • Hysteresis Simulation capability
  • Transmission line S,W
Custom Design
  • Fast Database
  • Full Panel Layout Capacity
  • Equal Resistance Router
  • Integrated DRC/LVS
  • Full-chip Interconnect RC Extraction
Extracted Netlist Analysis & Reduction
  • Parasitic Reduction
  • Design Analysis
  • Comparison of extracted netlist with parasitics
  • Fast Monte Carlo for sensitive control circuits
  • High sigma for array yield analysis
  • SPICE Accuracy for Power/EM/IR/Thermal analysis of sensitive control circuits
  • IR drop analysis for OLED pixel, interconnects