• SPICE Model Generation

Semiconductor Device Modeling for SPICE Simulation

Device Characterization and SPICE Model Extraction

As device geometries get smaller, it is increasingly more critical for technologists to use accurate models and control statistical variations in device processing performance. Circuit designers need models that can accurately predict DC behaviors, as well as RF and noise behaviors. Different process technologies require a variety of models that can be quickly adapted to the unique processes. With modeling measurements taking hours or even days, measurement control software must also work with probers and instruments to allow automated measurements across temperature.

Silvaco’s Utmost IV is the industry’s premier solution to address these challenges for the characterization and modeling of cutting-edge CMOS and compound semiconductor devices. It provides an easy-to-use, database-driven environment for the characterization of semiconductor devices and the generation of accurate, high-quality SPICE models, macro-models and Verilog-A models for analog, mixed-signal and RF applications.

Modeling for New Technologies

Today engineers who develop novel new semiconductor devices face a new challenge. Where circuit engineers use existing, standarized SPICE compact models to fit the behaviour of their transistors, no physical model is able to fit the behaviour of these new devices. Developing physical models is very complex and time consuming. TechModeler adresses this issue through an innovative Verilog-A blackbox compact modeling approach. TechModeler modeling solution brings this missing piece and fills the lack of physical models thanks to its unique compact modeling technology.

SPICE Model Generation Resources

Isato Ogawa,Tomoharu Yokoyama,Mutsumi Kimura,
“Simulation of neural network using ferroelectric capacitor,”
IEICE Technical Report Vol.117 No.372, No.373 , Dec 2017

Dondee Navarro*, Takeshi Sano*, and Yoshiharu Furui*,
“A Sequential Model Parameter Extraction Technique for Physics-Based IGBT Compact Models,”
IEEE Transactions on Electron Devices, Vol. 60, Issue 2, pp. 580-586, Feb. 2013.
*Silvaco engineer

Masataka Miyake, Dondee Navarro*, Uwe Feldmann, Hans Juergen Mattausch, Takashi Kojima, Takaoki Ogawa, and Takashi Ueta,
“HiSIM-IGBT: A Compact Si-IGBT Model for Power Electronic Circuit Design“,
IEEE Transactions on Electron Devices, Vol. 60, Issue 2, pp. 571 – 579, Feb. 2013.
*Silvaco engineer

Using SmartSpice Compact Models

TFT and OLED SPICE Modeling Using Utmost IV

Utmost IV Quick-Start Model Optimization Templates




Customer Interview: Why I Rely on SmartSpice

Simulate 40X Faster with SmartSpice HPP


Frédéric Masson
 This is the solution we were impatiently awaiting. Simulating a whole memory and analyzing accurately and quickly its yield has been a lastingly longed-for feature. 
Emmanuel Sabonnadiere
 Setting up advanced methods is essential with emerging technologies developed by CEA-Leti and the increase of memories’ needs. If a new method allows characterizing memory designs more quickly at a given condition of use, the entire characterization process that covers all conditions is accelerated 
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