• Belledonne

Belledonne Layout Parastic Extraction Comparison

Belledonne is used for layout comparison via extracted netlist. It compares two different extracted netlists and is mainly used for layout parasitic extraction (LPE) flow qualification.

Belledonne is integrated with the utility tool called Brenner that matches two different netlists. Brenner is used as the preparational step together with Belledonne, but it can also be used standalone.

Introduction

Switching between different layout parasitic extraction tools (LPE) calibrating different settings to a new technology node, qualifying update releases and others are tasks consuming a lot of time of CAD departments.  Belledonne is the first software solution that is dedicated to LPE tool qualification.

Belledonne enables quick and accurate comparison of different parasitics netlists. The netlist can be generated by different LPE tools from different vendors or by the same LPE tool with different sets of extraction parameters.

Belledonne helps backend physical verification teams and design teams to understand, quantify and qualify the different solutions or options they use in their parasitic extraction flow.

Features

  • Comparison of two netlists
    • Same LPE tool with different settings
    • Same LPE tool with different vendors
    • Different LPE tools from different vendors
  • Calculate different metrics for each netlist and compare
    • Effective resistance between pins
    • Effective capacitance between nets and from net to ground
    • Effective delay between pins

Benefits

    • Accelerate the creation, update and delivery of PDK
    • Useful for PDK optimization and validation
    • Increase the robustness of design kits
    • Compare different LPE tools
    • Certify the accuracy of different LPE tools
    • Visualize impact of different LPE tools settings
    • Find bugs in LPE tools and have them fixed
    • Useful for choosing different design routing options

Applications

  • Providers of Process Design Kits (PDK), CAD tool integrators and designers can use.

Technical Specifications

  • Input: Two extracted netlists of similar layout, generated by LPE tool
  • Formats: DSPF, SPEF, SPICE, Spectre

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Cameron Fisher
 MSC has found SmartSpice™ to be an excellent value in terms of easy integration, debug run time and total cost of simulation. Support during our learning curve has been great. MSC will be using SmartSpice™ for all future memory complier development.