{"id":31387,"date":"2002-02-20T22:46:34","date_gmt":"2002-02-20T22:46:34","guid":{"rendered":"https:\/\/silvaco.com\/%eb%b6%84%eb%a5%98%eb%90%98%ec%a7%80-%ec%95%8a%ec%9d%8c\/non-stationary-transport-effects-impact-on-performances-of-realistic-50nm-mosfet-technology\/"},"modified":"2021-07-16T22:03:42","modified_gmt":"2021-07-17T05:03:42","slug":"non-stationary-transport-effects-impact-on-performances-of-realistic-50nm-mosfet-technology","status":"publish","type":"post","link":"https:\/\/silvaco.com\/ko\/simulation-standard-ko\/non-stationary-transport-effects-impact-on-performances-of-realistic-50nm-mosfet-technology\/","title":{"rendered":"Non-Stationary Transport Effects: Impact on Performances of Realistic 50nm MOSFET Technology"},"content":{"rendered":"
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Non-Stationary Transport Effects: Impact on Performances of Realistic 50nm MOSFET Technology<\/h1>\n

Introduction<\/h3>\n

We analyze quantitatively the real impact of technology on the needed level for carrier transport modeling. The results, based on theoretical analyses, are applied to existing devices. This work shows which recipes must be used to evaluate the performances of advanced device architectures (down to 50nm gate length). An original point of this work is the investigation of technology influence (channel doping and LDD doping) on injection velocity at source side and on drain current. The results open the perspective of specific engineering of access regions in order to take full advantage of non-stationary effects on the drain current.<\/p>\n<\/div><\/section><\/div>

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