{"id":31204,"date":"2003-12-01T00:00:46","date_gmt":"2003-12-01T00:00:46","guid":{"rendered":"https:\/\/silvaco.com\/%eb%b6%84%eb%a5%98%eb%90%98%ec%a7%80-%ec%95%8a%ec%9d%8c\/schematic-driven-layout\/"},"modified":"2021-07-16T21:55:37","modified_gmt":"2021-07-17T04:55:37","slug":"schematic-driven-layout","status":"publish","type":"post","link":"https:\/\/silvaco.com\/ko\/simulation-standard\/schematic-driven-layout\/","title":{"rendered":"Schematic Driven Layout"},"content":{"rendered":"
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Schematic Driven Layout<\/h1>\n

Introduction<\/p>\n

Expert<\/strong><\/em>\u00a0schematic driven layout (SDL) is a CAD tool which increases the productivity of layout design by automating cell generation and providing visual cues to assist the wiring process. In the current implementation, schematic driven layout is used to automatically create IC layouts based on information from a netlist. Cell instances are created from existing cells. P-cells are instanced with parameters from the netlist file. Schematic driven layout automatically transfers net names, instance names and connectivity information from netlist to the layout. Automatic instantiation of cells with built-in connectivity support dramatically speeds up layout designer\u2019s productivity and accuracy.<\/p>\n

Operation Flow<\/p>\n

Expert<\/strong><\/em>\u00a0schematic driven layout operation flow is depicted in Figure 1.<\/p>\n

Preparing for Schematic Driven Layout<\/p>\n

An existing ELD project file must be opened for the automatically generated cells to be placed. Use the \u2018Tools>>SDL>>Load Netlist\u2019 menu command is used to load the file with the netlist. Circuit information will be displayed in the netlist panel with the circuit hierarchical tree (Figure 2). To run Schematic driven layout a library of predefined standard cells (resistors, capacitors, transistors, diodes, and other finished devices) must be placed in your custom cell. These standard cells can be located either in the current project or in the activated cell library. Cell libraries can be activated by \u2018Libraries>>Library setup\u2019 dialog panel. If the name of a standard cell differs from the name of the corresponding netlist instance, you have to provide a mapping file with correspondences between names. Each line of the mapping file should contain the subcircuit name and the layout cell name separated by a space or tab character:<\/p>\n<\/div><\/section><\/div>

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