{"id":30887,"date":"2012-07-01T18:29:23","date_gmt":"2012-07-01T18:29:23","guid":{"rendered":"https:\/\/silvaco.com\/%eb%b6%84%eb%a5%98%eb%90%98%ec%a7%80-%ec%95%8a%ec%9d%8c\/simulation-of-stress-evolution-during-semiconductor-device-fabrication\/"},"modified":"2021-07-16T21:42:31","modified_gmt":"2021-07-17T04:42:31","slug":"simulation-of-stress-evolution-during-semiconductor-device-fabrication","status":"publish","type":"post","link":"https:\/\/silvaco.com\/ko\/simulation-standard-ko\/simulation-of-stress-evolution-during-semiconductor-device-fabrication\/","title":{"rendered":"Simulation of Stress Evolution During Semiconductor Device Fabrication"},"content":{"rendered":"
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Simulation of Stress Evolution During Semiconductor Device Fabrication<\/h1>\n

Introduction<\/strong><\/p>\n

Accurate stress simulation has become a necessary part of performance and reliability analysis of semiconductor devices. In our previous paper [1] we demonstrated that 3D stress simulation of the whole cell provides more accurate prediction of stress effects on device performance than simulation limited to individual devices.<\/p>\n

In [1] we used a standard approach which calculates stresses in the final structures with some material regions (\u201cstressors\u201d) having specified values of intrinsic stress. Thus, this approach could be called a \u201donestep\u201d model where stresses are calculated only once for a given final structure.<\/p>\n

Another approach takes into account stress generation and changes associated with each processing step. Any semiconductor device manufacturing process consists of multiple steps including material layer depositions (in some cases with specific intrinsic stress), etching of the layers or their portions, as well as heating and cooling cycles. It is obvious that stresses in the device structure are changing from step to step because geometry, materials and temperatures are evolving through the process sequence. The more detailed \u201cstepbystep\u201d model calculates stresses after each process step taking into account current geometry, temperature, material properties, as well as stresses generated in the structure during previous steps. This approach can be called the \u201cstress evolution\u201d or \u201cstress history\u201d model.<\/p>\n

Obviously, the stress history approach is more time consuming but it definitely provides more accurate results. Some comparisons of stress history and onestep stress simulation results in 2D can be found in papers [2] and [3]. In this paper we analyze 2D and 3D stress evolution using the stress history capability recently implemented in the VICTORY Stress simulator. In the next section we show use of stress history model for accurate stress simulation in a thick deposited stressor film. After that we will demonstrate stress history effects in an interconnect structure. The third section presents the stress history simulation of a FinFET manufacturing process in comparison with the results of our previous paper [1].<\/p>\n<\/div><\/section><\/div>

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