New Model for Simulation of Exposure Process in Complex Nonplanar Resist-Substrate Structures

Predictive and efficient lithography simulation is an important component of the semiconductor industry efforts to develop the next generation of deep submicron technologies. Emerging technologies are based on elements with very small feature sizes and extremely complex and nonplanar topographies. Therefore lithography processing has to provide high resolution with large depth of focus. Simultaneously such effects as nonplanar reflections and notching as well as refractive index dependence on local absorbed dose are very critical for printing small mask elements using short wavelength radiation. This work presents a new approach for simulating the exposure process, which takes into account these effects in complex nonplanar resist-substrate structures.

Fast, Physical, Predictive and Calibrated Modeling of Ion Implantation

In a Research & Development environment, Technology Computer Aided Design (TCAD) is involved in the device optimization loop and requires efficient and predictive implantation modeling with frequent updating of the range of validity. For this purpose, semi-empirical models using statistical distributions are mainly chosen, because this kind of simulation is faster than the physically based Monte-Carlo (MC) approach. We propose a methodology which can be applied to ion implantation modeling with easy build-up, and which gives a predictive capability in the explored experimental domain.

Can Atlas be used to simulate advanced III-V or II-VI materials?

 Yes. ATLAS now supports a wide range of materials in its database. This database covers single element conductors, binary compounds and quaternary compounds. A complete list of all materials can be found in Appendix B of the ATLAS Users Manual Vol. II.

Modeling and Parameter Extraction Technique for HV MOS Devices with BSIM3v3

In this paper, I have used the same technique to model uni-directional HV MOS devices as previously reported for bi-directional HV MOS devices [4] -[5] while adopting a new parameter extraction technique. With the new uni-directional HV MOS modeling technique, the simulated I-V characteristics of the uni-directional n-channel HV MOS device match the measured characteristics well, which confirms its effectiveness.

New RF MOSFET Small Signal SPICE Model – Part 2

RF MOSFET Small - Signal Model and Parameters Small-signal equivalent circuit of MOSFET after de-embedding parasitics is shown in Figure 1 and small-signal model parameters are listed in Table 1. Parameter extraction is performed from real and imaginary parts of the Y-parameters. Each parameter is extracted from the Y-parameter equations which contain frequency terms.

UFSOI: Process-Based Compact SOI MOSFET Models

SOI technology appears now to have become an advantageous, viable option for low-voltage and high-performance CMOS integrated circuits in digital, analog, and mixed-signal applications. The thin-film nature of the SOI MOSFET, however, can underlie physical mechanisms that complicate circuit simulation and portend equivocation in design. Consequently, Silvaco has incorporated the physical process-based UFSOI MOSFET models into SmartSpice and Utmost.

Hints, Tips, and Solutions June 2000

Q: To simplify netlist extraction, I specify one kind of diffusion resistors in my layout by means of a special resistor definition layer. To my surprise, the extracted value for one such resistor always exactly twice the value I expected, no matter how I stretch this resistor.

Parametric-Cells Implementation in Expert

A parameterized cell (P-Cell) is a cell with user-specified parameters. It is possible to create customized p-cell instances with different composition according to parameter values. Using P-Cells gives a considerable memory reduction in the case of multiple instancing of a cell.

Dragon DRC: Performance Improvement Techniques

Dragon DRC is a new advanced hierarchical DRC system. The design principles this system is based on are carefully selected to ensure that Dragon DRC will deliver maximum performance in different execution environments. Designed as a highly adaptive and truly hierarchical DRC system, Dragon is able to execute DRC scripts much faster than any flat DRC system in most real-life cases.

Maverick and Guardian – Enhancements

The latest release of Layout versus Schematic tools from CELEBRITY CAD suite (Maverick full-chip parametric netlist extractor and Guardian hierarchical netlist comparator) delivers a number of significant advances. The engines of both tools were tuned up to achieve essential reduction of running time while processing huge designs.