This document is a short guide on the new and existing support for export cropping/slicing in Victory Process cell mode. The cropping operation is useful to extract a segment of the cell mode structure for further simulation. For example, a smaller subsection of a structure can be extracted, or a polygon mask crop can be used to extract a non-axis aligned segment. This allows an exported structure to be non-cuboid.

Irradiation by energetic particles can degrade semiconductor device performance. The particles involved can be electrons, positrons, neutrons, protons, alpha particles, heavy ions, or high-energy photons. As they pass through a device, these particles interact with the lattice. Energy deposited through these interactions may damage the lattice directly by displacing its atoms, or may result in the creation of electron/hole pairs. A sudden excess of electron/hole pairs may trigger a latchup, possibly damaging the device through overcurrent. Holes generated within an insulator may become trapped there, leading to a gradual accumulation of charge that worsens performance and eventually causes the device to fail. Consideration and modeling of these effects is important when designing semiconductor devices that will be exposed to high-energy radiation.

Two fundamental damage mechanisms take place when devices are exposed to particle fluences: ionization and lattice displacement or just displacement damage. Ionization has previously been addressed in other simulation standard articles. Neutrons, protons, alpha particles, heavy ions, and very high-energy photons cause lattice displacement, or just displacement damage. Particle bombardment can change the arrangement of the atoms in the crystal lattice creating lasting damage, and increase the number of recombination (defect) centers depleting the minority carriers and degrading the analog properties of the affected semiconductor junctions. High dose rates of particles (particles/area-s) can cause partial annealing (“healing”) of the damaged lattice, leading to a lower degree of damage than with the same doses delivered in low intensity over a longer time period.

It is often not realized that more than one Single Event Upset (SEU) statement can be used in a simulation. Each SEU statement can locate a strike anywhere in the semiconductor and at any time during the transient, offering a range of simulation possibilities. One possible use for simulating multiple SEU strikes is for simulating spallation events, where a high energy particle, such as a cosmic ray, suffers a nuclear interaction, producing one or more different sources of ionizing particle at the nuclear reaction site. In this article, we will, demonstrate two SEU strikes in different locations at two different times on a full six transistor 22nm SRAM cell, including four layers of metal interconnect.