엔트리 Ingrid Schwarz

VarMan을 이용한 아날로그 설계의 통계 분석 플로우

11월 10, 2016카테고리: /작성자:

일시: 2016년 11월 11일 | 3:00am-3:30am (한국 시각)
VarMan은 아날로그 설계자를 위한 구체적인 통계 분석을 포함합니다. 아날로그 셀 또는 AMS/RF IC를 신속하게 분석할 수 있도록, 혁신적인 몬테 카를로 부스터를 내장하였습니다. 몬테 카를로보다 빠른 VarMan은 주어진 시간 내에서 변동성 문제를 해결할 수 있도록 합니다.

TCAD Simulation of Impact Ionization at Cryogenic Temperatures, down to 3 K

10월 1, 2016카테고리: /작성자:

Some electronic devices operate at very low, cryogenic temperatures, sometimes as low as 4 K, which is the temperature of liquid helium. Such devices include infra-red (IR) photodetectors or single-photon Avalanche Photo-Diodes (APD) (also known as a Geiger-mode APD or GAPD), based on a reverse biased p-n junction in which a photo-generated carrier can trigger an avalanche current due to the impact ionization mechanism. This device is able to detect low-intensity optical signals, e.g. single photon [1], [2].

Stress Induced by Intrinsically Strained Silicon Nitride Passivation Films of AlGaN/GaN HEMTs Using Victory Process 2D

10월 1, 2016카테고리: /작성자:

In the AlGaN/GaN HEMT fabrication process, silicon nitride (Si3N4) passivation of the HEMT surface layer, which is typically AlGaN, is commonly used to mitigate defect-related charge traps at the AlGaN surface. However, sufficiently thick Si3N4 passivation films manifest built-in or intrinsic stress that induces mechanical stress in underlying AlGaN/GaN HEMTs. Depending on deposition conditions, intrinsic stress in Si3N4 passivation films can be either compressive or tensile. Using Victory Process 2D to simulate stress induced by intrinsically strained passivation films of Si3N4 allows assessment of the influence such intrinsic stresses exerts on the AlGaN/ GaN HEMT performance.

Victory Process 2D – A Valuable Alternative To SUPREM-based Simulators

10월 1, 2016카테고리: /작성자:

SUPREM-IV – Stanford University PRocEss Modeling Program was first released 30 years ago. Since then its descendants – Athena from Silvaco and TSUPREM-4TM from TMA/Avant/Synopsys – have been 2D process simulation “work-horses” in semiconductor industry world-wide. Despite the fact that tremendous progress in the industry indeed requires the transition to 3D TCAD there are still many technologies and applications where a 2D simulation is the most practical approach. At the same time, we have to recognize that the SUPREM-based simulators cannot keep up with the progress because they lack many fundamental capabilities required for simulation of modern processes. Victory Process (VP) has been developed by Silvaco to address these challenging requirements. Though ultimate purpose of VP is accurate simulation of complex 3D process it still can be used as a valuable alternative to or even advantageous substitution for SUPREM based simulators. The 2D-mode of Victory Process (VP2D) differs from the full 3D mode only by setting a 2D simulation domain when simulation starts. This means that the same syntax, models, algorithms, layout and the whole process flow can be used in both 2D and 3D. This guarantees smooth transition from 2D to 3D process simulation.

유기 광전자 소자의 TCAD 시뮬레이션

9월 27, 2016카테고리: /작성자:

2016년 9월 28일 | 3:00am-3:30am (한국 시각)
이번 시간에 LED와 OLED 소자의 통합 시뮬레이션 환경으로 개발된 Radiant를 소개하고, 뛰어난 효율과 색 품질, 색 조정으로 디스플레이와 조명 분야에서 많은 관심을 받고 있는 OLED를 중점적으로 설명합니다.

Simulation of Device Degradation Due to Bias Temperature Stress

7월 1, 2016카테고리: /작성자:

Introduction Bias Temperature Instability (BTI) [1] ranks among the most serious reliability issues in present-day semiconductor devices. In pMOSFETs, for instance, it is observed when large negative biases are applied to the gate at elevated temperatures. These operation conditions cause a shift of the threshold voltage, resulting in an unwanted change of the device characteristics. With the continuous miniaturization of MOS devices, this phenomenon has become increasingly pronounced and has reached a level, at which it can even lead to device failure in the worst case.