{"id":29216,"date":"2005-03-01T00:02:25","date_gmt":"2005-03-01T00:02:25","guid":{"rendered":"https:\/\/silvaco.com\/uncategorized\/new-parasitic-capacitance-modeling-in-hipex-c\/"},"modified":"2021-07-08T18:27:52","modified_gmt":"2021-07-09T01:27:52","slug":"new-parasitic-capacitance-modeling-in-hipex-c","status":"publish","type":"post","link":"https:\/\/silvaco.com\/ja\/simulation-standard\/new-parasitic-capacitance-modeling-in-hipex-c\/","title":{"rendered":"New Parasitic Capacitance Modeling in Hipex-C"},"content":{"rendered":"
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New Parasitic Capacitance Modeling in Hipex-C<\/h1>\n

Introduction<\/h3>\n

In deep submicron technology, conduction layers have widths much smaller than their thicknesses (see Figure 1). This makes edge parasitic capacitance effects more dominant than plate capacitance.<\/p>\n

In a multi-body system, neighboring conductors may capture some or all of the electrical fields lines emanating from a particular conductor. These field lines would otherwise terminate else where. This phenomenon is called charge sharing, which plays an important role in modeling parasitic capacitances.<\/p>\n

This article presents new approaches to dealing with charge sharing and vertical shielding in Silvaco\u2019s parasitic capacitance extraction tool,\u00a0Hipex-C<\/em><\/strong>. The three main commands in\u00a0Hipex-C<\/em><\/strong>,\u00a0FRINGE<\/span>,\u00a0LATERAL<\/span>\u00a0and\u00a0AREA<\/span>, cover all of the capacitance calculation requirements that one would expect from a industry leading capacitance extraction tool.\u00a0FRINGE<\/span>\u00a0enables edge-to-body,\u00a0LATERAL<\/span>\u00a0enables edge-to-edge and\u00a0AREA<\/span>\u00a0enables plate capacitance modeling.
\nAll the commands allow one to specify different capacitance coefficients for different vertical configurations of the primary layers to account for charge sharing effects. The layers above or below or both the primary conductor(s) define the vertical configuration.<\/p>\n

Vertical Shielding<\/h3>\n

Vertical shielding is caused by the vertical order of layers. When more than two conduction layers overlap, the inside layers shield the capacitance effects between the outer layers, Figure 2. demonstrates the effects of vertical shielding.
\nNote the following vertical shielding effects for primary layers\u00a0metal2<\/span>\u00a0and\u00a0poly<\/span>:<\/p>\n