{"id":28937,"date":"2015-04-01T17:51:48","date_gmt":"2015-04-01T17:51:48","guid":{"rendered":"https:\/\/silvaco.com\/uncategorized\/vertical-locos-power-devices-in-victory-process-from-3d-process-and-electrical-optimisation-to-high-speed-full-chip-process-emulation\/"},"modified":"2021-07-08T18:18:00","modified_gmt":"2021-07-09T01:18:00","slug":"vertical-locos-power-devices-in-victory-process-from-3d-process-and-electrical-optimisation-to-high-speed-full-chip-process-emulation","status":"publish","type":"post","link":"https:\/\/silvaco.com\/ja\/simulation-standard\/vertical-locos-power-devices-in-victory-process-from-3d-process-and-electrical-optimisation-to-high-speed-full-chip-process-emulation\/","title":{"rendered":"Vertical LOCOS Power Devices in Victory Process: From 3D Process and Electrical Optimisation to High Speed, Full Chip Process Emulation"},"content":{"rendered":"<div id='av_section_1'  class='avia-section main_color avia-section-small avia-no-border-styling  avia-bg-style-scroll  avia-builder-el-0  el_before_av_section  avia-builder-el-first   container_wrap fullsize' style='background-color: #ffffff;  margin-top:0px; margin-bottom:0px; '  ><div class='container' ><main  role=\"main\" itemprop=\"mainContentOfPage\"  class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-28937'><div class='entry-content-wrapper clearfix'>\n<div class='flex_column_table av-equal-height-column-flextable -flextable' style='margin-top:20px; margin-bottom:0px; '><div class=\"flex_column av_one_full  flex_column_table_cell av-equal-height-column av-align-top first  avia-builder-el-1  avia-builder-el-no-sibling  \" style='padding:0px 0px 0px 0px ; border-radius:0px; '><\/div><\/div><!--close column table wrapper. Autoclose: 1 -->\n\n<\/div><\/div><\/main><!-- close content main element --><\/div><\/div><div id='template_overview'  class='avia-section main_color avia-section-small avia-no-border-styling  avia-bg-style-scroll  avia-builder-el-2  el_after_av_section  el_before_av_section   container_wrap fullsize' style='background-color: #ffffff;  margin-top:0px; margin-bottom:0px; '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-28937'><div class='entry-content-wrapper clearfix'>\n<div class='flex_column_table av-equal-height-column-flextable -flextable' style='margin-top:20px; margin-bottom:0px; '><div class=\"flex_column av_three_fourth  flex_column_table_cell av-equal-height-column av-align-top first  avia-builder-el-3  el_before_av_one_fourth  avia-builder-el-first  \" style='padding:0px 0px 0px 0px ; border-radius:0px; '><section class=\"av_textblock_section \"  itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/BlogPosting\" itemprop=\"blogPost\" ><div class='avia_textblock  '   itemprop=\"text\" ><h1 align=\"left\">Vertical LOCOS Power Devices in Victory Process:<br \/>\nFrom 3D Process and Electrical Optimisation to High Speed, Full Chip Process Emulation<\/h1>\n<h2>Introduction<\/h2>\n<p>There is a constant demand to lower the on-state resistance of devices, improving their energy efficiency as well as increasing their current handling capabilities whilst maintaining the desired breakdown voltage. However, a trade-off relationship exists between the on-state resistance and breakdown voltage. This is referred to as the silicon limit [1]. Attempts have been made to break the silicon limit. One such method proposed by several authors is the Vertical LOCOS MOS (VLOCOS) [2,3].<\/p>\n<p>Such structures are relatively easy to simulate in 2D. However, the layout designs are inherently 3D [4]. Therefore it is critical that accurate and robust 3D simulations are undertaken to understand and fully optimize the electrical characteristics.<\/p>\n<p>In this Simulation Standard article, a rigorous investigation is made into the effect that various different 3D corner designs have on device breakdown performance. The simulations are executed using Victory Process (VP), Silvaco\u2019s fully three dimensional process simulation tool with 3D physical oxidation.<\/p>\n<\/div><\/section><\/div><div class='av-flex-placeholder'><\/div><div class=\"flex_column av_one_fourth  flex_column_table_cell av-equal-height-column av-align-top av-zero-column-padding   avia-builder-el-5  el_after_av_three_fourth  avia-builder-el-last  \" style='border-radius:0px; ' id=\"whitepaper\" ><p><div  class='avia-builder-widget-area clearfix  avia-builder-el-6  el_before_av_image  avia-builder-el-first '><div id=\"nav_menu-29\" class=\"widget clearfix widget_nav_menu\"><div class=\"menu-simulation-standard-side-menu-japanese-container\"><ul id=\"menu-simulation-standard-side-menu-japanese\" class=\"menu\"><li id=\"menu-item-26253\" class=\"menu-item menu-item-type-post_type menu-item-object-page menu-item-26253\"><a href=\"https:\/\/silvaco.com\/ja\/technical-library\/simulation-standard\/\">Simulation Standard<\/a><\/li>\n<\/ul><\/div><\/div><\/div><br \/>\n<div  class='avia-image-container  av-styling-    avia-builder-el-7  el_after_av_sidebar  el_before_av_button  avia-align-center '  itemprop=\"image\" itemscope=\"itemscope\" itemtype=\"https:\/\/schema.org\/ImageObject\"  ><div class='avia-image-container-inner'><div class='avia-image-overlay-wrap'><a href=\"\/dynamicweb\/jsp\/downloads\/DownloadDocStepsAction.do?req=download&amp;nm=simstd_Q2_2015_a1.pdf\" class='avia_image' target=\"_blank\" rel=\"noopener noreferrer\"><img decoding=\"async\" width=\"232\" height=\"300\" class='wp-image-19733 avia-img-lazy-loading-not-19733 avia_image' src=\"https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/simstd_Q2_2015_a1-232x300.jpg\" alt='' title='simstd_Q2_2015_a1'  itemprop=\"thumbnailUrl\" srcset=\"https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/simstd_Q2_2015_a1-232x300.jpg 232w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/simstd_Q2_2015_a1-768x994.jpg 768w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/simstd_Q2_2015_a1-545x705.jpg 545w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/simstd_Q2_2015_a1-29x37.jpg 29w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/simstd_Q2_2015_a1-43x55.jpg 43w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/simstd_Q2_2015_a1-37x48.jpg 37w, https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/simstd_Q2_2015_a1.jpg 782w\" sizes=\"(max-width: 232px) 100vw, 232px\" \/><\/a><\/div><\/div><\/div><br \/>\n<div  class='avia-button-wrap avia-button-center  avia-builder-el-8  el_after_av_image  avia-builder-el-last ' ><a href='\/dynamicweb\/jsp\/downloads\/DownloadDocStepsAction.do?req=download&amp;nm=simstd_Q2_2015_a1.pdf' class='avia-button  avia-color-grey   avia-icon_select-yes-right-icon avia-size-small avia-position-center ' target=\"_blank\" rel=\"noopener noreferrer\"><span class='avia_iconbox_title' >Download Simulation Standard<\/span><span class='avia_button_icon avia_button_icon_right' aria-hidden='true' data-av_icon='\ue875' data-av_iconfont='entypo-fontello'><\/span><\/a><\/div><\/p><\/div><\/div><!--close column table wrapper. Autoclose: 1 --><\/div><\/div><\/div><!-- close content main div --><\/div><\/div><div id='av_section_3'  class='avia-section main_color avia-section-small avia-no-border-styling  avia-bg-style-scroll  avia-builder-el-9  el_after_av_section  avia-builder-el-last   container_wrap fullsize' style='background-color: #ffffff;  margin-top:0px; margin-bottom:0px; '  ><div class='container' ><div class='template-page content  av-content-full alpha units'><div class='post-entry post-entry-type-page post-entry-28937'><div class='entry-content-wrapper clearfix'>\n<div class='flex_column_table av-equal-height-column-flextable -flextable' style='margin-top:20px; margin-bottom:0px; '><div class=\"flex_column av_one_full  flex_column_table_cell av-equal-height-column av-align-top first  avia-builder-el-10  avia-builder-el-no-sibling  \" style='padding:0px 0px 0px 0px ; border-radius:0px; '><\/div><\/div><!--close column table wrapper. Autoclose: 1 -->\n<\/p>\n","protected":false},"excerpt":{"rendered":"<p>There is a constant demand to lower the on-state resistance of devices, improving their energy efficiency as well as increasing their current handling capabilities whilst maintaining the desired breakdown voltage. However, a trade-off relationship exists between the on-state resistance and breakdown voltage. This is referred to as the silicon limit [1]. Attempts have been made to break the silicon limit. One such method proposed by several authors is the Vertical LOCOS MOS (VLOCOS) [2,3].<\/p>\n","protected":false},"author":5,"featured_media":19733,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7570],"tags":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v24.0 (Yoast SEO v24.0) - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Vertical LOCOS Power Devices in Victory Process: From 3D Process and Electrical Optimisation to High Speed, Full Chip Process Emulation - \u30b7\u30eb\u30d0\u30b3\u30fb\u30b8\u30e3\u30d1\u30f3 : Silvaco Japan<\/title>\n<meta name=\"description\" content=\"There is a constant demand to lower the on-state resistance of devices, improving their energy efficiency as well as increasing their current handling capabilities whilst maintaining the desired breakdown voltage.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/silvaco.com\/simulation-standard\/vertical-locos-power-devices-in-victory-process-from-3d-process-and-electrical-optimisation-to-high-speed-full-chip-process-emulation\/\" \/>\n<meta property=\"og:locale\" content=\"ja_JP\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Vertical LOCOS Power Devices in Victory Process: From 3D Process and Electrical Optimisation to High Speed, Full Chip Process Emulation\" \/>\n<meta property=\"og:description\" content=\"There is a constant demand to lower the on-state resistance of devices, improving their energy efficiency as well as increasing their current handling capabilities whilst maintaining the desired breakdown voltage.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/silvaco.com\/simulation-standard\/vertical-locos-power-devices-in-victory-process-from-3d-process-and-electrical-optimisation-to-high-speed-full-chip-process-emulation\/\" \/>\n<meta property=\"og:site_name\" content=\"\u30b7\u30eb\u30d0\u30b3\u30fb\u30b8\u30e3\u30d1\u30f3 : Silvaco Japan\" \/>\n<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/SilvacoSoftware\/\" \/>\n<meta property=\"article:published_time\" content=\"2015-04-01T17:51:48+00:00\" \/>\n<meta property=\"article:modified_time\" content=\"2021-07-09T01:18:00+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/silvaco.com\/wp-content\/uploads\/2020\/03\/simstd_Q2_2015_a1.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"782\" \/>\n\t<meta property=\"og:image:height\" content=\"1012\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"author\" content=\"Ingrid Schwarz\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:creator\" content=\"@SilvacoSoftware\" \/>\n<meta name=\"twitter:site\" content=\"@SilvacoSoftware\" \/>\n<meta name=\"twitter:label1\" content=\"\u57f7\u7b46\u8005\" \/>\n\t<meta name=\"twitter:data1\" content=\"Ingrid Schwarz\" \/>\n\t<meta name=\"twitter:label2\" content=\"\u63a8\u5b9a\u8aad\u307f\u53d6\u308a\u6642\u9593\" \/>\n\t<meta name=\"twitter:data2\" content=\"6\u5206\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"WebPage\",\"@id\":\"https:\/\/silvaco.com\/simulation-standard\/vertical-locos-power-devices-in-victory-process-from-3d-process-and-electrical-optimisation-to-high-speed-full-chip-process-emulation\/\",\"url\":\"https:\/\/silvaco.com\/simulation-standard\/vertical-locos-power-devices-in-victory-process-from-3d-process-and-electrical-optimisation-to-high-speed-full-chip-process-emulation\/\",\"name\":\"Vertical LOCOS Power Devices in Victory Process: From 3D Process and Electrical Optimisation to High Speed, Full Chip Process Emulation - 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