Two-dimensional oscillatory neural networks for energy efficient neuromorphic computing

Feb. 5, 2020 On the 4 th and 5th of February 2020, in Montpellier (France), at the premises of LIRMM, CNRS the Kick-off meeting of NeurONN took place. All the Partners of the NeurONN Consortium met and set the ground for the activities along the three-year duration of the EU Project

For Next Generation Nanowires, Simulation from Atoms to SPICE

As process nodes continue to shrink, the requirement for additional physics-based simulation is gradually creeping into each stage of the design process. By way of illustration, Technology Computer Aided Design (TCAD) simulations are becoming more atomistic in nature, SPICE models are becoming process aware to take account of localized strain effects, and back or middle end of line (BEOL or MEOL) parasitics are moving from exclusively two-dimensional (2D) rule-based solutions to full 3D structure field solvers for numerous critical sections of the layout.

Atomistic Analysis and Next Generation Computing at IEDM 2019

IEDM is THE device conference with more than a thousand participants from major companies and R&D institutes. Many talks were dedicated to new memory devices and circuits, including Ferroelectrics, MRAM, RRAM, driven by the requirements of AI processing. EUV is definitely there for 3nm and beyond. 3D integration was shown for LP-HP logic and RF. Gate-All-Around devices, with nanowires or nanosheets are mature versus FinFET.

TCAD Recommended Textbooks

CMOS: Mixed-Signal Circuit Design, Second Edition R. Jacob Baker. Published…

3次元NANDメモリ・セルのセレクト・ゲート・トランジスタ最適化

本ウェビナーでは、セレクト・ゲート・トランジスタに注目した3次元NANDメモリ・セル動作の最適化で、TCADプロセスおよびデバイス・ソフトウェアをどのように利用できるかを紹介します。

Silvaco Exhibits and Presents Invited Paper on Atomistic Simulation at IEDM 2019

The IEEE International Electron Devices Meeting (IEDM) is the world’s preeminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. It is the flagship conference forNanometer-scale CMOS transistor technology, advanced memory, displays, sensors, MEMS devices Novel quantum and nano-scale devices and phenomenology Optoelectronics, devices for power and energy harvesting, high-speed devices Process technology and device modeling and simulation

シリコン・デバイスの極低温シミュレーション

本ウェビナーでは、ドリフト拡散法を使用して4ケルビンから100ケルビンの温度でシリコン・デバイス動作をシミュレーションする場合に発生する問題について考察します。

SiCおよび各種ワイドバンドギャップ材料:プロセス・シミュレーションからデバイス・シミュレーションまで

本ウェビナーでは、シルバコのTCADツールの概要を説明します。ここでは、シルバコのワイドバンドギャップ材料向けプロセス/デバイス・シミュレーションの機能を紹介します。さらに、SiC JBSダイオードおよびGaN FETなど、さまざまな実例について実演し考察します。

How TCAD Can Optimize Power Electronics

The power electronics (PE) market is growing rapidly, driven by the accelerating demand of EV and HEV vehicles. Power devices lend themselves to design and manufacturing innovations at the transistor-level to improve device performance and reduce development and production costs. Silicon-carbide (SiC), gallium-nitride (GaN), and other wide bandgap materials have started to replace silicon in high-voltage power devices.

The Need for Advanced Wide Bandgap Power Electronics

PowerAmerica’s strategic roadmap for next generation wide bandgap (WBG) power electronics (PE) came out earlier this year. The public version of the roadmap includes a background/introduction and market forecast pertaining to silicon carbide (SiC) and gallium nitride (GaN) PE. I learned a great deal about SiC & GaN PE in this roadmap and I have copied the relevant sections below.