For high performance large area flexible electronics, amorphous metal oxide semiconductor based thin film transistors offer many advantages. These include high mobility, steep sub-threshold and ultralow leakage current, with low cost and large area manufacturability.
Gallium Nitride High Electron Mobility (GaN HEMT) device technology has gained a lot of traction during the last years. These devices have significant advantages compared to Silicon in user applications such as high frequency/high power amplifiers, radar systems, power conversion and applications where stability over a wide range of temperatures is required, such as automotive-related.
Geometrical module of Victory Process allows the fast and accurate transfer of mask patterns to the structure. However, sometimes it is necessary to emulate the imperfections of physical processes while retaining the speed and accuracy of the geometrical approximation. For example, you may want to test the tolerance of the final device to random fluctuations in structure’s geometry.
寄生RCを正確に見極めることは、最新の半導体技術を設計、統合する上で重要な要素となります。ルール・ベースの寄生抽出を使用する従来のフローでは、精度の要求を満たせない場合や、適切なLPEルール・デッキが準備できない場合があります。このような問題の解決には、フィールド・ソルバを利用する物理ベースの寄生抽出が最適なソリューションです。フィールド・ベースのソリューションでは、寄生RCに及ぼす形状の影響を、より詳細に考慮できるリアルな3次元形状を用いることで、最適な寄生抽出が可能です。
本ウェビナーではシルバコのVarManで、どのようにしてこの問題を解決するかをご説明します。
本ウェビナーではシルバコのSPI、QSPI(Quad SPI)、およびOSPI(Octal SPI) IP製品について、現在のSOC設計における有用性を考察します。
Lower conduction loss and fast switching characteristics for power devices are increasingly required in the more and more energy-conscious world. For the low to medium voltage ranges (12 V ~ 250 V), the split gate structures [1] have become prevalent in the power MOSFET technologies [2-4]. They allow to achieve the best trade-off between the breakdown voltage (BV) and specific on-state resistance (RSP) for the vertical discrete power MOSFETs. Most of these solutions are based on the RESURF (Reduced Surface Field) action of Split-Gate Resurf Stepped Oxide (SG-RSO) along the drift region.
It is often the case, that an Engineer is required to simulate environmental effects on a device manufactured by a third party. In such an event, the first issue that is faced by the Engineer, is a lack of access to the manufacturing process that created the third party device in the first place. In this article, it is shown how to overcome this first issue, and reverse engineer a sufficiently representative base device, simply from the manufacturer’s specification sheet. Once a satisfactory device has been fabricated, it can be used in the required simulation to analyze any effects of interest. In this particular case, we will demonstrate the damaging effects of irradiating a 2N2222A bipolar transistor with a proton flux and compare the simulated results with other similar measured results.
In recent years, radio-frequency (RF) CMOS on Silicon-on-Insulator (SOI) has rapidly evolved as a mainstream technology for switches used in wireless applications such as tuners and power amplifiers [1, 2]. Since such applications can involve switching high power levels at high frequencies (~2 GHz), the technology considerations are substantially different than those for SOI used in high speed, small signal applications such as microprocessors. Requirements of lower insertion loss, better isolation, and better linearity have driven RF CMOS-SOI roadmap.
本ウェビナーではGatewayツール・フローとiPDKデザイン・キットの統合について考察します。