How to Eliminate Image Retention Issues with SmartSpice Flex Modeling
2022年6月10日 | 2:00-2:30 JST
本ウェビナーでは、SmartSpiceのFlex Modelingテクノロジを使用して、イメージ・リテンションの問題をシミュレーションする方法について説明します。
この作成者はまだ経歴を書いていません。
でも、Gigi Boss さんは、なんと 410 件ものエントリーに貢献されたことを誇りに思いましょう。
2022年6月10日 | 2:00-2:30 JST
本ウェビナーでは、SmartSpiceのFlex Modelingテクノロジを使用して、イメージ・リテンションの問題をシミュレーションする方法について説明します。
Self-heating effect may cause over-heated damage and degradation for silicon-on-insulator (SOI) devices, so numerical counting heat generated, and distribution can optimize the radio frequency integrated circuits (RFICs) applications. Both conventional and high resistivity, trap-rich SOI substrates are fabricated to investigate self-heating effects. There are two identical n channel metal-oxide-semiconductor-field-effect transistors (nMOSFETs) placed together to share a common source and the same active silicon region. One MOSFET is biased above threshold voltage and into saturation to heat-up the active region as a heater, and another device is biased into the sub-threshold regime to track the temperature changes as a localized thermometer. Compared to bulk single crystal silicon, the trap-rich SOI substrate consists of a high-defected polysilicon layer, which has introduced between the buried oxide layer and substrate. Due to the grain boundaries, the polysilicon layer has more phonon scattering and less value of thermal conductivity. However, based on the measurement results, two types of substrates SOI devices have similar performance for temperature increased. Therefore, a Silvaco numerical simulation has been issued to analysis the heat flow distribution within the devices and dissipation solution.
2022年5月13日 | 2:00-2:30 JST
本ウェビナーでは、シルバコが提供するAMBA AHBサブシステムの概要と製品について説明します。また、チャネル vs. ファブリック・アーキテクチャ、低消費電力、カスタマイズ、ハードウェアおよびソフトウェアベースのセキュリティ、ハードウェアとソフトウェアの協調検証などのトピックがあります。
2022年5月6日 | 2:00-2:30 JST
本ウェビナーでは、量子輸送シミュレータに実装されている最新のインコヒーレント散乱モデルを紹介します。
2022年4月29日 | 2:00-2:30 JST
本ウェビナーでは、SmartSpiceの4端子TFTコンパクト・モデルについて説明します。市場でもユニークなこのコンパクトモデルの特徴と、モデリングチームと設計チームの双方にもたらす自由度の一部をご紹介します。
Victory Mesh support for line statements lets the user customize the volume mesh used by conformal remesh schemes. The volume mesh data inherited from Victory Process can be replaced with a new volume mesh defined within Victory Mesh, allowing full control over the conformal remesh and generating a mesh suitable for device simulation in Victory Device.
In this hints and tips two case studies are discussed.
In the first, a solid modeling case will show how a FinFET is made using solid modeling commands, and how a volume mesh generated with line statements in Victory Mesh is used to generate a conformal remesh. A comparison of device simulations with a refined Delaunay mesh is also presented.
In the second, a buffered super junction LDMOS is loaded from Victory Process and remeshed using a customized volume grid created with line statements in Victory Mesh.
2022年3月25日 | 2:00-2:30 JST
本ウェビナーでは、mqSemiの紹介と3次元TCADモデルおよびシミュレーション結果、そしてシルバコの強力なVictory ProcessとVictory Deviceを紹介します。
The flat panel display industry has been growing rapidly for recent years in mobile display, car display, AR/VR applications, and large-scale TVs display. The core technology enabling these applications is the light emitting diode (LED), which is a key component to realize the highly visible, power efficient, displays. For decades, many researchers have developed blue and green LEDs using wide band gap GaN-based wurtzite crystalline material, and successfully manufactured LED devices. However, to make a bright white LED and/or an integrated RGB display, red and yellow LED is also needed. To accomplish this, a smaller bandgap material like a cubic AlGaInP material can be used.
2022年3月18日 | 2:00-2:30 JST
本ウェビナーでは、シルバコのTCADツール Victory Deviceを使用して、さまざまなシリコンベース基板の小信号および大信号の挙動をモデル化した事例を紹介します。
カリフォルニア州サンタクララ発 – 2022年3月2日 – TCAD、EDAソフトウェア、デザインIPのリーディング・プロバイダであるSilvaco Group, Inc(以下シルバコ)は、本日イメージング・ソリューションのグローバル・リーダであるTeledyne e2vが、CMOSイメージ・センサの開発を加速させるためにシルバコのTCADソリューションVictoryの契約を更新したことを発表しました。
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