エントリー - Gigi Boss

2022 TCAD Baseline Release

New Features in the 2022 Baseline Release:

  • Section 1: Process Simulation – New Features in 2022 Baseline Release
  • Section 2: Device Simulation – New Features in 2022 Baseline Release
  • Section 3: Victory Mesh – New Features in 2022 Baseline Release
  • Section 4: Silver – New Features in 2022 Baseline Release

Learn How to Efficiently Achieve Accurate Experimental Etch Profiles in FinFET and Memory Applications with Victory TCAD Solution

2022年8月12日 | 2:00-2:30 JST
本ウェビナーでは、FinFETとメモリデバイスへの適用を例に、これらの幾何学エッチング・モデルを紹介します。フィンの形状制御や、非理想的なエッチング形状(ボーイング、ツイスト)、セルフ・アライン・プロセス(マルチパターニング)を実現する技術を紹介します。

Simulation of the High Temperature Performance of InGaN ‘Topping’ Cells

This work reports on the design of a high efficiency InGaN-based two junction (2J) tandem solar cell via numerical simulation, operating at high temperatures (450o C) and under 200 suns for application in a hybrid concentrating solar thermal (CST) system. To address the polarization and band-offset issues for GaN/InGaN heterojunction solar cells, band engineering techniques are employed. A simple interlayer is proposed at the hetero-interface rather than using an In composition grading layer, which is difficult to fabricate. The base absorber thickness and doping concentration have been optimized for 1J cell performance, and current matching was imposed on the series constrained 2J tandem cell design. The simulation results show that the crystalline quality (short recombination lifetime) of current nitride materials is a critical limiting factor the performance of the 2J cell design at high temperatures. The theoretical conversion efficiency of the best devices can be as high as ~21.8% at 450o C and 200X based on the assumed material parameters.

Learn How Silvaco Flow Helps Designing and Simulating Pixel Arrays in Flat Panel Displays and Detectors

2022年7月1日 | 2:00-2:30 JST
本ウェビナーでは、ディスプレイおよびディテクタの大手企業が、シルバコのツールの機能を活用して、回路図およびレイアウトの編集、最新の TFT技術で必要となる非常に正確なフィールド・ソルバ・ベースの寄生抽出、寄生RC素子のネットリストへのバックアノテーション、大規模なピクセル・アレイの高速かつ正確なSPICEシミュレーションを実現している事例をご紹介します。

Investigation of Self-Heating Effects in SOI MOSFETs with Silvaco Numerical Simulation

Self-heating effect may cause over-heated damage and degradation for silicon-on-insulator (SOI) devices, so numerical counting heat generated, and distribution can optimize the radio frequency integrated circuits (RFICs) applications. Both conventional and high resistivity, trap-rich SOI substrates are fabricated to investigate self-heating effects. There are two identical n channel metal-oxide-semiconductor-field-effect transistors (nMOSFETs) placed together to share a common source and the same active silicon region. One MOSFET is biased above threshold voltage and into saturation to heat-up the active region as a heater, and another device is biased into the sub-threshold regime to track the temperature changes as a localized thermometer. Compared to bulk single crystal silicon, the trap-rich SOI substrate consists of a high-defected polysilicon layer, which has introduced between the buried oxide layer and substrate. Due to the grain boundaries, the polysilicon layer has more phonon scattering and less value of thermal conductivity. However, based on the measurement results, two types of substrates SOI devices have similar performance for temperature increased. Therefore, a Silvaco numerical simulation has been issued to analysis the heat flow distribution within the devices and dissipation solution.

Learn About Silvaco’s AMBA AHB Subsystems and How to Customize, Secure, and Verify

2022年5月13日 | 2:00-2:30 JST
本ウェビナーでは、シルバコが提供するAMBA AHBサブシステムの概要と製品について説明します。また、チャネル vs. ファブリック・アーキテクチャ、低消費電力、カスタマイズ、ハードウェアおよびソフトウェアベースのセキュリティ、ハードウェアとソフトウェアの協調検証などのトピックがあります。

How Can I Remesh a Structure Using a Custom Volume Mesh in Victory Mesh?

Victory Mesh support for line statements lets the user customize the volume mesh used by conformal remesh schemes. The volume mesh data inherited from Victory Process can be replaced with a new volume mesh defined within Victory Mesh, allowing full control over the conformal remesh and generating a mesh suitable for device simulation in Victory Device.
In this hints and tips two case studies are discussed.
In the first, a solid modeling case will show how a FinFET is made using solid modeling commands, and how a volume mesh generated with line statements in Victory Mesh is used to generate a conformal remesh. A comparison of device simulations with a refined Delaunay mesh is also presented.
In the second, a buffered super junction LDMOS is loaded from Victory Process and remeshed using a customized volume grid created with line statements in Victory Mesh.