Hipex-NET is SILVACO’s powerfull hierarchical layout netlist extractor. Built-in extracting rules permit to make fast and accurate parameter extraction for basic set of devices as MOS, BJT, diode, capacitor and resistor. But these rules can’t descibe all devices features and parameters that appeare in new submicron or RF layout designs. To resolve this problem the new HIPEX-NET command HIPEX GENERIC_DEVICE has been introduced. This new HIPEX-NET feature gives to user the capability to extract not only additional parameters for standard devices but also custom defined devices with arbitrary set of parameters. This article describes the new HIPEX-NET command.

In this paper the electrostatic impact of Channel Hot Electron (CHE) injection in discrete-trap memories is quantitatively addressed. The dual bit behavior of the transfer characteristic during forward and reverse read of a written cell is thoroughly analysed with the help of an analytical model. Such model allows, for the first time, to estimate the effective charged portion of the discrete storage layer, L2, and the quantity of electrons, Q, injected in the trapping

The subject of how to use the EXTRACT statement in DeckBuild often arises. The EXTRACT statement is a very useful tool for analysing data and can be performed on both structure and log files.

This article focuses on the use of Silvaco’s RFIC Design Suite including PDK, SmartSpice-RF, and Gateway.

1. Introduction

BSIM1, the first model of the BSIM series was released about ten years ago. Some major improvements have been made since that time, making the BSIM3v3 and BSIM4 models become worldwide standards. This article presents the evolutions brought to BSIM models from BSIM3v3 to BSIM5 and BSIMDG, as well as their applications and differences.