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SmartSpice Does It Smart

By this definition, any SPICE simulator qualifies as a smart design tool, but what about versatility? SmartSpice has had over 30 years of product development and is the Swiss Army knife of circuit simulators, with wide applicability to different CAD design flows.

The Need for Advanced Wide Bandgap Power Electronics

PowerAmerica’s strategic roadmap for next generation wide bandgap (WBG) power electronics (PE) came out earlier this year. The public version of the roadmap includes a background/introduction and market forecast pertaining to silicon carbide (SiC) and gallium nitride (GaN) PE. I learned a great deal about SiC & GaN PE in this roadmap and I have copied the relevant sections below.

3D TCAD Simulation for Power Devices

y first IC design back in 1978 was a DRAM and it ran on 12V, 5V and -5V, but then my second DRAM was using only a 5V supply. Today we see SOCs running under a 1V supply voltage, but there is a totally different market for power devices that are at the other end of the voltage spectrum and they handle switching ranges from 12V – 250V. To learn more about power devices and how the process and device modeling is done, I read a Silvaco publication entitled Advanced Process and Device 3D TCAD Simulation of Split-Gate Trench UMOSFET.

Where Circuit Simulation Model Files Come From

I started out my engineering career by doing transistor-level circuit design and we used a proprietary SPICE circuit simulator. One thing that I quickly realized was that the accuracy of my circuit simulations depended entirely on the model files and parasitics. Here we are 40 years later and the accuracy of SPICE circuit simulations still depend on the model files and parasitics, but with the added task of using 3D field solvers to get accurate parasitic values, and even the use of 3D TCAD tools to model the complex physics of nm IC designs using FinFET transistors.

230 Papers on Power Device Simulations using Silvaco TCAD

A quick search of the IEEE Xplore online library gives a list of more than 230 published technical articles on Power Device Simulation using Silvaco TCAD. Here are some recent papers with the authors’ abstracts that cover silicon-carbide (SiC) and Junction-Less Double Gate MOSFET devices. Any mention of ‘we’ or ‘our’ refers to the paper’s authors:

Advanced Materials and New Architectures for AI Applications

Over the past 50 years in our industry, there have been three invariant principles:Moore’s Law drives the pace of Si technology scaling system memory utilizes MOS devices (for SRAM and DRAM) computation relies upon the “von Neumann” architecture

Everything You Want to Know about Silvaco Foundation IP

In the creation of an ASIC or SoC a wide variety of digital components are needed. Standard logic cells are used to implement the high-level description of the chip which is typically written in RTL. A synthesis tool such as Design Compiler or RTL Compiler is used to generate a gate-level netlist built out of the standard logic cells from a cell library. Communication on and off of the chip, requires unique input/output cells or I/Os that can drive off-chip wiring and withstand electrostatic discharges in the range of thousands of volts. The other main category is digital memories typically SRAMS that can take up a significant amount of area on the die for a chip. These 3 categories of digital design IP are called Foundation IP.

System and Method for IP Fingerprinting and IP DNA Analysis

In the world of SoC development, an IP management system is software for the licensing, distribution and compliance administration of design IP for both vendors and consumers of IP.In May 2019 Silvaco was awarded a patent for System and Method for IP fingerprinting and IP DNA analysis. This patent reflects the unique technology inside the Xena® IP Management System from Silvaco.