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Accelerating Design with the Victory TCAD Suite

The Simulation Standard, Silvaco’s technical journal for semiconductor process and device engineers is beginning its 30th year of publication. The latest issue has just been released and it outlines a complete power device design flow using the Victory suite of TCAD simulation solutions – Victory Process, Victory Mesh, and Victory Device.

TCAD Simulations of RF-SOI Switches with Trap-Rich Substrate

The market for cellular components has been shifting rapidly from GaAs pHEMT or silicon-on-sapphire (SOS) to silicon-based technology. CMOS (silicon-on-insulator) SOI antenna switches which are compatible with multimode GSM/EDGE, TD/WCDMA, and LTE systems exhibit higher integration levels and have become the fastest growing mobile phone submarket. CMOS-SOI processes, especially with thin silicon, have the potential to rival the FoM that was traditionally feasible only with GaAs technologies.

New MIPI I3C V1.1 Standard Streamlines Peripheral Connectivity with Lower Cost and Higher Bandwidth

The MIPI Alliance (MIPI) develops interface specifications for mobile and mobile-influenced industries. There is at least one MIPI specification in every smartphone manufactured today.

For Next Generation Nanowires, Simulation from Atoms to SPICE

As process nodes continue to shrink, the requirement for additional physics-based simulation is gradually creeping into each stage of the design process. By way of illustration, Technology Computer Aided Design (TCAD) simulations are becoming more atomistic in nature, SPICE models are becoming process aware to take account of localized strain effects, and back or middle end of line (BEOL or MEOL) parasitics are moving from exclusively two-dimensional (2D) rule-based solutions to full 3D structure field solvers for numerous critical sections of the layout.

Atomistic Analysis and Next Generation Computing at IEDM 2019

IEDM is THE device conference with more than a thousand participants from major companies and R&D institutes. Many talks were dedicated to new memory devices and circuits, including Ferroelectrics, MRAM, RRAM, driven by the requirements of AI processing. EUV is definitely there for 3nm and beyond. 3D integration was shown for LP-HP logic and RF. Gate-All-Around devices, with nanowires or nanosheets are mature versus FinFET.

Free 350 pg. Book on SoC Design and Secure Autonomous Driving Webinar

Silvaco has an upcoming webinar IP Solutions for Secure Autonomous Driving on Dec. 3, 10am – 11am (PST) .The webinar will present the risks and necessary countermeasures for securing cyber-physical vehicle systems.

Customer Case Study: Using SmartSpice to Deliver Next-Generation, Low Power Memory Systems

At our SURGE Santa Clara event in October, Cameron Fisher, CEO of Mobile Semiconductor described their experience in adopting SmartSpice as their characterization engine for creating the database for their Trailblaze™ memory compiler software. Below is a summary of his talk.

Silvaco Exhibits and Presents Invited Paper on Atomistic Simulation at IEDM 2019

The IEEE International Electron Devices Meeting (IEDM) is the world’s preeminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. It is the flagship conference forNanometer-scale CMOS transistor technology, advanced memory, displays, sensors, MEMS devices Novel quantum and nano-scale devices and phenomenology Optoelectronics, devices for power and energy harvesting, high-speed devices Process technology and device modeling and simulation