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Products
Overview
TCAD
Analog,
Mixed Signal, RF
Custom IC CAD
Interconnect
Modeling
Digital CAD
Downloads & Support
Licensing
PDK Design Flows
Technical Library
Services
Corporate
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SmartSpice RF
Frequency and time domain RF circuit simulator
SmartSpice RF employs a combination of Time-Domain Shooting and Frequency-Domain
Harmonic Balance methods to provide accurate simulation of GHz range RF ICs. It accurately
and efficiently simulates harmonic distortion, intermodulation products, gains, noise,
oscillator’s phase noise in non-linear circuits using SPICE netlists.
Key Features
- Performs complete set of periodic and quasi-periodic steady-state analyses for large-signal and small-signal applications - each with full parametric sweep and Monte Carlo control parameters
- Time-domain Shooting method to simulate periodic steady-state of highly nonlinear circuits
- Time-Frequency domain Envelope analysis of circuits driven by digitally modulated sources
- A complete set of digitally modulated signals is supported together with all SmartSpice models for large-signal, small-signal, noise, and parametric analysis
- Provides simulations and measurements of the spectral regrowth, I/Q parameters, ACPR, NPR, EVM, BER in amplifiers/mixers, and characterization of the transmission link quality in communications systems, etc.
- Silvaco's strong encryption is available to protect valuable customer and third party intellectual property.
Applications
- Applications cover amplifier, mixer, multiplier, oscillator, VCO, AGC, PLL, Mux, Demux, Clock, and CDR designs
- SmartSpice RF supports the analysis needs of wireless standards such as GMSK, MPSK, MQAM, MFSK, EDGE, OFDM, WCDMA.
Harmonic Balance and Shooting Simulation Engine
- SmartSpice RF harmonic balance simulator provides frequency-domain, steady-state, large-signal analysis of non-linear circuits driven with multi-tone sources
- Time-domain Shooting method simulation of periodic steady-state of highly nonliner circuits
- Optimal convergence with a complete set of interactive control parameters - spectral Newton, continuation, and GMRES solvers
Integration into Complete RF Design Flow
- Integrated with Gateway schematic editor for simulation control interface, schematic entry, and testbench design
- Integral part of Silvaco’s complete, PDK supported, mixed-signal/RF design flow
Silvaco RF Design Flow with RF PDK.
Gateway schematic capture.
SmartSpice RF Analyses Capabilities and Their Applications
- Supports periodic steady-state simulation of single-tone excitations using frequency domain (Harmonic) and time domain (Shooting) methods
- Quasi-periodic steady-state (Spectral) for multi-tone excitations
- Steady-state AC (HAC, SPAC) for small-signal analysis for mixers
- Steady-state transfer functions (HTF, SPTF) for conversion efficiency, image and sideband rejection, LO feed-through and power supply rejection
- Steady-state NET (HNET, SPNET) to compute S-parameters for two port circuits exhibiting frequency translation with scattering (S), impedance (Z), admittance (Y), and hybrid (H) parameters, stability factors, different gains, stable gain circuits, etc.
- Steady-state noise (HNOISE, SPNOISE) for output noise spectrum of amplifiers, mixers, and oscillator phase noise
- Direct periodic steady-state two-stage (HOSCIL) simulation of oscillators with phase noise extraction
- Circuit envelope simulation enables spectral re-growth, I/Q parameters, ACPR, NPR, EVM, BER simulations of amplifiers/mixers and characterization of the transmission link quality of communications systems using time-swept harmonic balance method
Phase noise simulation of an oscillator. |
A complete simulation of a mixer. |
Examples Available in Gateway
- Frequency domain sources
- Time domain sources
- Modulated sources
- Noise sources
- Voltage/Current controlled sources
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- Passive components (RLC)
- Diode model
- Transistor components for MOS, BJT, HBT
- S-Parameter models for transmission lines
- Filter, amplifier, mixer and PLL components
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Low Noise Amplifier Design (LNA). |
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Powerful Support Environment for RF Design
- Smith charts, eye diagrams, spectral plots, histograms, signal-to-noise calculations, gain and stability circles, constellation diagrams, etc.
- Circuit and parameter optimizer for gain, matching networks, IP3, and power dissipation for process migration
- Sources include independent multi-tone voltage/current sources, multi-tone resistive ports, and complete output port device parameters
- Development of complete foundry MS/RF Process Design Kits available
- Interface to QUEST for RF modeling of spiral inductors and S-parameters for RF interconnects

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| PI/4-DQPSK trajectory diagram |
Power amplifier ACPR simulation |
RF Measurement Capabilities
- 1dB Compression Points
- Nth order Intercept Points
- Nth order intermodulation products
- Mixer conversion gain
- Two-port noise parameters
- SSB and DSB Noise figure
- Output noise power spectral density
- Minimum noise figure
- Phase noise
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- Gamma Opt
- Input and output stability circles
- Gain circles
- Impedance/Admittance Locus vs. Frequency
- Large-signal S-parameters and K-factor
- Total Harmonic Distortion
- Power Added Efficiency
- S-Parameters
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Rev. 101410_21
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Victory Process
3D Process Simulator
Victory Process is a general purpose 3D process simulator. Victory Process includes a complete process flow core simulator and three advanced simulation modules: Monte Carlo Implant, Advanced Diffusion and Oxidation, and Physical Etch and Deposit.
Victory Cell
3D Process Simulator For Large Structures
Victory Cell is a fast, layout-driven 3D process simulator specifically designed for large structures.
Athena
Process Simulation Framework
Athena framework integrates several process simulation modules within a user-friendly environment provided by Silvaco TCAD interactive tools.
SSuprem 4
2D Core Process Simulator
SSuprem4 is a 2D process simulator that is widely used in the semiconductor industry for design, analysis and optimization of various fabrication technologies.
MCImplant
Advanced Monte-Carlo Implantation Simulator
MCImplant is a generic ion implantation simulator, which models ion stopping, defect generation, and ion implantation distributions in amorphous and crystalline materials.
Elite
Advanced Physical Etching and Deposit Simulator
Elite is an advanced 2D topography simulator for modeling physical etching, deposition, reflow and CMP planarization processes for modern semiconductor technologies.
MC Etch & Deposit
2D Monte Carlo Deposition and Etch Simulator
MC Deposit/Etch is an advanced topology simulation module seamlessly interfaced with Elite through the ATHENA framework.
Optolith
Advance 2D Optical Lithography Simulator
Optolith is a powerful non-planar 2D lithography simulator that models all aspects of modern deep sub-micron lithography: imaging, exposure, photoresist bake, development and reflow.
Athena 1D
1D Process Simulator
Athena 1D is a 1D mode of operation of the industry standard Athena 2D Process Simulator.
Victory Device
3D Device Simulator
Victory Device is a general purpose 3D device simulator. A tetrahedral meshing engine is used for fast and accurate simulation of complex 3D geometries.
Device 3D
3D Device Simulator
Device3D is a physics based 3D device simulator for any device type and includes material properties for the commonly used semiconductor materials in use today.
Giga 3D
3D Non-Isothermal Device Simulator
Giga3D module extends Device3D by incorporating the effects of self-heating into a device simulation.
MixedMode 3D
Circuit Simulation for Advanced 3D Devices
MixedMode 3D is a circuit simulator that includes physically-based 3D devices in addition to compact analytical models.
Quantum 3D
3D Simulation Models For Quantum Mechanical Effect
Quantum 3D provides a set of models for simulation of the various effects of quantum confinement and quantum transport of carriers in semiconductor devices.
Luminous 3D
3D Optoelectronic Device Simulator
Luminous 3D is an advanced simulator used to model absorption and photogeneration in semiconductor devices with arbitrary topology in three dimensions.
TFT 3D
3D Amorphous and Polycrystaline Device Simulator
TFT 3D is an advanced device technology simulator equipped with the physical models and specialized numerical techniques required to simulate amorphous or polysilicon devices in 3D.
LED 3D
3D Light Emitting Diode Simulator
LED 3D is a module used for simulation and analysis of light emitting diodes. LED 3D is integrated in the ATLAS framework and allows simulation of electrical, optical and thermal behavior of light emitting diodes in 3D.
Magnetic 3D
3D Magnetic Device Simulator
Magnetic 3D module enables the ATLAS device simulator to incorporate the effects of an externally applied magnetic field on the device behaviour.
Thermal 3D
Thermal Packaging Simulator
Thermal 3D is a general heatflow simulation module that predicts heatflow from any power generating devices (not limited to semiconductor devices), typically through a substrate and into the package and/or heatsink via the bonding medium.
Atlas
Device Simulation Framework
Atlas enables device technology engineers to simulate the electrical, optical, and thermal behavior of semiconductor devices.
S-Pisces
2D Silicon Device Simulator
S-Pisces is an advanced 2D device simulator for silicon based technologies that incorporates both drift-diffusion and energy balance transport equations.
Blaze
2D Device Simulator for Advanced Materials
Blaze simulates devices fabricated using advanced materials. It includes a library of binary, ternary and quaternary semiconductors.
Giga
Non-Isothermal Device Simulator
Giga combined with S-Pisces and Blaze device simulators allows simulation of self heating effects.
MixedMode
Circuit Simulation for Advanced 2D Devices
MixedMode is a circuit simulator that includes physically-based devices in addition to compact analytical models.
Quantum
2D Simulation Models for Quantum Mechanical Effects
Quantum provides a set of models for simulation of various effects of quantum confinement and quantum transport of carriers in semiconductor devices.
Luminous
2D Optoelectronics Device Simulator
Luminous is an advanced device simulator specially designed to model light absorption and photogeneration in non-planar semiconductor devices.
TFT
2D Amorphous and Polycrystalline Device Simulator
TFT is an advanced device technology simulator equipped with the physical models and specialized numerical techniques required to simulate amorphous or polysilicon devices including thin film transistors.
LED
2D Light Emitting Diode Simulator
LED is a module used for simulation and analysis of light emitting diodes.
Organic Display
OLED and OTFT Organic Display Simulator
Organic Display module enables ATLAS to simulate the electrical and optical properties of organic display devices such as OTFTs and OLEDs.
Organic Solar
Organic Solar Cell and Photodetector Simulator
Organic Solar module enables ATLAS to simulate the electrical and optical properties of organic solar cell devices, photodetectors and image sensors.
Laser
Semiconductor Laser Diode Simulator
Laser is the world’s first commercially available simulator for semiconductor laser diodes.
VCSEL
Vertical Cavity Surface Emitting Laser Simulations
VCSEL is used in conjunction with the ATLAS framework to produce physically based simulations of vertical cavity surface emitting lasers (VCSELs).
Noise
2D Small-Signal Noise Simulator
Noise combined with S-Pisces or Blaze allows analysis of the small-signal noise generated within semiconductor devices.
Ferro
Ferroelectric Field Dependent Permittivity Model
Ferro has been developed to combine the charge-sheet model of FET with Maxwell’s first equation which describes the properties of the ferroelectric film.
Magnetic
2D Magnetic Device Simulator
Magnetic module enables the ATLAS device simulator to incorporate the effects of an externally applied magnetic field on the device behavior.
Mercury
Fast Simulation of FETS
Mercury is an ATLAS module optimized for the fast simulation of FETs. Mercury is physics-based and so can be used for the predictive simulation of devices.
MC Device
2D Monte Carlo Device Simulator
MC Device simulates the behavior of relaxed and strained silicon devices including non-equilibrium and ballistic effects in 2D.
Victory Stress
3D Stress Simulator
Victory Stress is a generic 3D stress simulator designed to calculate stresses, strains and mobility enhancement for 3D structures as well as stress evolution during multiple step process flows.
DeckBuild
Interactive Deck Development and Runtime Environment
DeckBuild is an interactive runtime and input file development environment within which all Silvaco’s TCAD and several other EDA products can run.
MaskViews
Integrated Layout Editor
MaskViews is a simple to use, yet powerful layout editor that can read, write, create and edit layout files in either GDS2 or Silvaco’s layout format.
DevEdit
Structure and Mesh Editor
DevEdit can be used to either create a device from scratch or to remesh or edit an existing device.
TonyPlot
1D/2D Interactive Visualization Tool
Tonypolot is a powerful tool designed to visualize TCAD 1D and 2D structures produced by Silvaco TCAD simulators. TonyPlot provides visualization and graphic features such as pan, zoom, views, labels and multiple plot support.
TonyPlot 3D
3D Interactive Visualization Tool
TonyPlot 3D is a powerful graphics tool, capable of displaying 3D TCAD data generated by Silvaco TCAD process or device simulators and Silvaco's 3D parasitic products.
VWF
VIRTUAL WAFER FAB
VWF is software used for performing Design of Experiments (DOE) and Optimization Experiments. Split-lots can be used in various pre-defined analysis methods.
Gateway
Schematic Editor
Gateway supports both flat and hierarchical designs and can be used to create designs for both analog and digital. Gateway is fully integrated into our analog and digital simulators.
SmartSpice
Analog Circuit Simulator
SmartSpice delivers the highest performance and accuracy required to design complex high precision analog circuits, analog mixed-signal circuits, analyze critical nets, characterize cell libraries, etc.. SmartSpice is compatible with popular analog design flows and foundry-supplied device models.
Verilog-A Language
Source, Compiled and Encrypted
The Verilog-A language when combined with SmartSpice can provide circuit designers the ability to write custom models and verification of complex designs.
SmartSpice RF
Frequency and time domain RF circuit simulator
SmartSpice RF combines Time-Domain Shooting and Frequency Domain Harmonic Balance methods to provide accurate simulation of RF circuits.
Harmony
Analog/Mixed-Signal Simuator
Hamony is an analog/mixed signal simulator that provides all the capabilities of SmartSpice and Silos and through this give the accuracy, performance, capacity and flexibility to simulate circuits expressed in Verilog, SPICE, Verilog-A and Verilog-AMS.
Utmost III
Device Characterization and modeling
Utmost III generates accurate, high quality SPICE models for analog, mixed-signal and RF applications.
Utmost IV
Optimization Module for Compact/Macro-Modeling
Generates accurate, high quality SPICE models that can be used in analog, mixed-signal and RF simulators.
Spayn
Statistical Parameter and Yield Analysis
Spayn is a statistical modeling tool for analyzing variances from model parameter extraction sequences, electrical test routines, and circuit test measurements.
Expert
Layout Editor and Viewer
Expert is a high performance hierarchical IC layout editor with full editing features, large capacity and fast layout viewing.
Guardian
DRC/LVS/NET Physical Verification
Guardian provides interactive and batch mode verification of analog, mixed signal and RF IC designs.
Hipex
Full-Chip Parasitic Extraction
Hipex is an accurate and fast full-chip hierarchical extraction software that performs extraction of parasitic capacitances and resistances from hierarchical layouts.
Clarity RLC
RLC Netlist Reduction
Clarity RLC is an efficient and accurate tool that performs reduction of linear parasitic RLC elements in extracted netlists. Tool is based on Scattering-Parameter-Based Macromodeling and Time Domain methods.
Exact
Full Chip LPE Rule File Generator
Exact delivers the most accurate interconnect models for nanometer semiconductor processes and generates full chip layout parameter extraction (LPE) rule files.
Quest
3D RF Passive Device Modeling
Quest calculates 3D frequency dependent inductance, resistance, capacitance and capacitive loss for any multi-port network for RF SPICE analysis.
Clever
RC Extractor for Realistic 3D Structures
Clever is a physics-based RC extractor that uses GDSII mask data and process information to create a realistic 3D structure for MEMS, advanced CMOS, TFT, Memory cells, etc., using its built-in etch/deposit processor and optolithographical simulator.
Stellar
3D Physics-Based RC Extractor for Large Cells
Stellar fills the size gap between typical small cell field solvers and full chip extractors.
Silos
Verilog Simulator
Silos is an easy-to-use IEEE-1364-2001 compliant Verilog simulator used by leading IC designers. An industry standard since 1986, its powerful interactive debugging features provide today’s most productive design environment for FPGA, PLD, ASIC and custom digital designs.
HyperFault
Mixed-Level Fault Simulator
HyperFault is a Verilog IEEE-1364-2001 compliant fault simulator that analyzes test vectors’ ability to detect faults. Supports mixed levels of gate, behavioral, and switch with SDF timing.
AccuCell
Cell Characterization and Modeling
AccuCell is an accurate, automated, fast and flexible software tool for characterizing and validating standard cell, I/O and custom cell libraries.
AccuCore
Block Characterization, Modeling and STA
AccuCore performs timing characterization of multi-million device circuits with SmartSpice accuracy and performs block and full-chip Static Timing Analysis (STA) on multi-million gate designs.
Catalyst AD
SPICE Netlist to Verilog Gates Converter
Catalyst AD is the premier tool for converting transistor-level designs into verilog gate-level representations with applications in microprocessor, DSP, graphics and high-speed communication markets.
Catalyst DA
Verilog Netlist to SPICE Netlist Converter
Catalyst DA is a software program that translates a structural Verilog netlist into equivalent SPICE format netlist to be used for layout verification or SPICE simulation.
Spider
Place and Route Design Flow
Spider is a netlist-to-GDSII place and route design flow for mainstream physical design and implementation.